-- **********************************************************************
-- *                                                                    *
-- *       Hardware Register Mappings for the IO-62 PCI I/O Board       *
-- *                                                                    *
-- **********************************************************************
-- File: rda/pcicards/io62.inc
--
--                        COPYRIGHT (c) 2001  BY
--          SIGMET INCORPORATED, WESTFORD MASSACHUSETTS, U.S.A.
-- 
-- THIS SOFTWARE IS FURNISHED UNDER A LICENSE AND MAY BE USED AND  COPIED
-- ONLY  IN  ACCORDANCE WITH  THE  TERMS  OF  SUCH  LICENSE  AND WITH THE
-- INCLUSION OF THE ABOVE COPYRIGHT NOTICE.  THIS SOFTWARE  OR  ANY OTHER
-- COPIES  THEREOF MAY NOT BE PROVIDED OR OTHERWISE MADE AVAILABLE TO ANY
-- OTHER PERSON.  NO TITLE TO AND OWNERSHIP OF  THE  SOFTWARE  IS  HEREBY
-- TRANSFERED.
--

-- = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =
-- This file must be manually maintained in parallel with its C
--    companion file: io62.h.  The syntax between C and AHDL
--        is too different to try to patch automatically.
-- = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =

-- ***********************************
-- *                                 *
-- * IO62 Control/Status Definitions *
-- *                                 *
-- ***********************************

CONSTANT IO62CSRSZ             = 128 ;	-- CSR decoded address space (DWORDs)
CONSTANT IO62CSRHIB = LOG2(IO62CSRSZ) - 1 ;

-- ------------------------------
-- CAUTION: Address 0x00 is RESETADDR
-- CAUTION: Address 0x01 is ISR_ADDR

-- ------------------------------
-- Board Edge LEDs.  Note that the "Always ON" code is assigned the
-- value zero so that all of the LEDs light up upon reset.
--
CONSTANT IO62REDLED        = H"03" ;	-- Red LED options
  CONSTANT IO62REDLED_ON      =  0 ; 	--   On always
  CONSTANT IO62REDLED_OFF     =  1 ;	--   Off always
  CONSTANT IO62REDLED_PCIACT  =  2 ;	--   Shows PCI access

CONSTANT IO62GRNLED        = H"04" ;	-- Green LED options
  CONSTANT IO62GRNLED_ON      =  0 ; 	--   On always
  CONSTANT IO62GRNLED_OFF     =  1 ;	--   Off always

CONSTANT IO62VISLED        = H"05" ;	-- Green (edge visible) LED options
  CONSTANT IO62VISLED_ON      =  0 ; 	--   On always
  CONSTANT IO62VISLED_OFF     =  1 ;	--   Off always

-- ------------------------------
-- Front Panel Display Control
--
CONSTANT IO62FPDCSR        = H"06" ;	-- Control/Status
CONSTANT IO62FPDATA        = H"07" ;	-- Character read/write

-- ------------------------------
-- Dual 14-bit DAC Outputs
--
CONSTANT IO62DAC0          = H"08" ;	-- DAC #0
CONSTANT IO62DAC1          = H"09" ;	-- DAC #1 (must follow #0)

-- ------------------------------
-- Two on-board relays
--
CONSTANT IO62RELAY         = H"0A" ;	-- Relay control in bits <1:0>

-- ------------------------------
-- Miscellaneous monitor/force bits.  These signals will generally be
-- driven by logic that is internal to the FPGA.  However, we can force
-- the lines Hi/Lo under program control, and can also readback the
-- present state of the outputs.
--
CONSTANT IO62MF            = H"0B" ;	-- Monitor/Force bits
  CONSTANT IO62MF_TRIG0H      =  0 ;	--   Force trigger drivers high
  CONSTANT IO62MF_TRIG1H      =  1 ;
  CONSTANT IO62MF_TRIG2H      =  2 ;
  CONSTANT IO62MF_TRIG3H      =  3 ;
  CONSTANT IO62MF_TRIG0L      =  4 ;	--   Force trigger drivers low
  CONSTANT IO62MF_TRIG1L      =  5 ;
  CONSTANT IO62MF_TRIG2L      =  6 ;
  CONSTANT IO62MF_TRIG3L      =  7 ;
  CONSTANT IO62MF_TRIG0       =  8 ;	--   Current state of trigger drivers
  CONSTANT IO62MF_TRIG1       =  9 ;
  CONSTANT IO62MF_TRIG2       = 10 ;
  CONSTANT IO62MF_TRIG3       = 11 ;
  CONSTANT IO62MF_TTY0XH      = 12 ;	--   Force TTY transmitters high
  CONSTANT IO62MF_TTY1XH      = 13 ;
  CONSTANT IO62MF_TTY0XL      = 14 ;	--   Force TTY transmitters low
  CONSTANT IO62MF_TTY1XL      = 15 ;
  CONSTANT IO62MF_TTY0X       = 16 ;	--   Current state of TTY transmitters
  CONSTANT IO62MF_TTY1X       = 17 ;
  CONSTANT IO62MF_TTY0R       = 18 ;	--   Current state of TTY receivers
  CONSTANT IO62MF_TTY1R       = 19 ;

-- ------------------------------
-- General purpose Counter/Timers
--
CONSTANT IO62TIMER0        = H"0C" ;	-- Timers 0-2 Control/Status
CONSTANT IO62TIMER1        = H"0D" ;
CONSTANT IO62TIMER2        = H"0E" ;

  CONSTANT IO62TIMER0_NBITS   = 20 ;	--   Number of bits in timers 0-2
  CONSTANT IO62TIMER1_NBITS   = 16 ;
  CONSTANT IO62TIMER2_NBITS   = 16 ;

  CONSTANT IO62TIMER_CLK1MHZ  =  0 ;	--   Clock = 1MHz
  CONSTANT IO62TIMER_CLKIOSHR =  1 ;	--   Clock = shared Line #N -> Timer #N

-- ------------------------------
-- Selection of shared I/O status lines which are copied to other boards
-- via the softplane, and which can serve as counter/timer inputs.
--
CONSTANT IO62SHARE         = H"0F" ;	-- Shared line input sources
  CONSTANT IO62SHARE_LINE0    =  0 ;	--   Readback of status input lines
  CONSTANT IO62SHARE_LINE1    =  1 ;
  CONSTANT IO62SHARE_LINE2    =  2 ;
  CONSTANT IO62SHARE_MODEL0   =  8 ;	--   Which line hookup model is
  CONSTANT IO62SHARE_MODEL1   =  9 ;	--     being used.

    CONSTANT IO62SHMOD_UNUSED   =  0 ;	-- All lines are grounded
    CONSTANT IO62SHMOD_TDWR_V1  =  1 ;	-- MIT/Lincoln TDWR ACP/ARP

-- ------------------------------
-- General purpose I/O lines, allocated in groups of eight.  The five
-- GIO CSRs assign the configuration of each block of signals, organized
-- as four signal pairs.
--
CONSTANT IO62GIO0          = H"10" ;	-- General purpose I/O lines.  Each
CONSTANT IO62GIO1          = H"11" ;	--   RD-Only control register affects
CONSTANT IO62GIO2          = H"12" ;	--   a group of eight I/O lines.
CONSTANT IO62GIO3          = H"13" ;
CONSTANT IO62GIO4          = H"14" ;
  CONSTANT IO62GIO_RSDRIVE0   =  0 ;	--   Independent enable lines for the
  CONSTANT IO62GIO_RSDRIVE1   =  1 ;	--     four RS422 drivers.  Only used
  CONSTANT IO62GIO_RSDRIVE2   =  2 ;	--     in RS422 and RSTTLPULL modes.
  CONSTANT IO62GIO_RSDRIVE3   =  3 ;

  CONSTANT IO62GIO_RSCHIPS0   =  4 ;	--   Selects whether each signal pair
  CONSTANT IO62GIO_RSCHIPS1   =  5 ;	--     is driven/received as RS422
  CONSTANT IO62GIO_RSCHIPS2   =  6 ;	--     or as TTL.  Only used in RS422
  CONSTANT IO62GIO_RSCHIPS3   =  7 ;	--     and RSTTLPULL modes.

  CONSTANT IO62GIO_INTERNAL0  =  8 ;	--   Selects whether each signal pair
  CONSTANT IO62GIO_INTERNAL1  =  9 ;	--     is driven/received by internal
  CONSTANT IO62GIO_INTERNAL2  = 10 ;	--     logic or via the PCI registers.
  CONSTANT IO62GIO_INTERNAL3  = 11 ;

  CONSTANT IO62GIO_DCONFIG0   = 12 ;	--   Overall digital I/O configuration
  CONSTANT IO62GIO_DCONFIG1   = 13 ;
    CONSTANT IO62DCF_DISABLED   =  0 ;	--     All functions disabled
    CONSTANT IO62DCF_TTLDRIVE   =  1 ;	--     Configure as eight TTL drivers
    CONSTANT IO62DCF_RS422      =  2 ;	--     Configure as four RS422 Tx/Rx
    CONSTANT IO62DCF_RSTTLPULL  =  3 ;	--     As above, but w/ TTL-In & Pulls

  CONSTANT IO62GIO_RSTERMS    = 14 ;	--   Pairwise RS422 terminators
  CONSTANT IO62GIO_PULLUP     = 15 ;	--   +5V pullup, else GND pulldown

CONSTANT IO62GIODATAP      = H"16" ;	-- Read/Write data levels (20-bit) for
CONSTANT IO62GIODATAM      = H"17" ;	--   the "+" and "-" signal pins.
CONSTANT IO62GIODALTP      = H"18" ;	-- ReadOnly bits being received by the
CONSTANT IO62GIODALTM      = H"19" ;	--   unused TTL or RS232 receiver.

-- ------------------------------
-- PCI Read/Write 32-bit diagnostic mirror
--
CONSTANT IO62MIRROR        = H"1A" ;	-- Reads back what's written

-- ------------------------------
-- Onboard trigger driver control register
--
CONSTANT IO62TRIGS         = H"1B" ;	-- Trigger source selection
  CONSTANT IO62TRIGS_DRIVEN0  =  0 ;	--   Line driver #0 hooked to a trigger
  CONSTANT IO62TRIGS_DRIVEN1  =  1 ;	--               #1
  CONSTANT IO62TRIGS_DRIVEN2  =  2 ;	--               #2
  CONSTANT IO62TRIGS_DRIVEN3  =  3 ;	--               #3

  CONSTANT IO62TRIGS_D0TG0TG4 =  4 ;	--   Use Trig0/Trig4 for line #0
  CONSTANT IO62TRIGS_D1TG1TG5 =  5 ;	--   Use Trig1/Trig5 for line #1
  CONSTANT IO62TRIGS_D2TG2PL0 =  6 ;	--   Use Trig2/Pol0  for line #2
  CONSTANT IO62TRIGS_D3TG3PL1 =  7 ;	--   Use Trig3/Pol1  for line #3

  CONSTANT IO62TRIGS_PHASEOUT =  8 ;	--   Drive 8-bit phase on I/O lines #4-11
  CONSTANT IO62TRIGS_PHASESET =  9 ;	--   Use fixed phase, not live softplane

    CONSTANT IO62TRIGS_CMDBITS  =  10 ;	--   Number of command bits

  CONSTANT IO62TRIGS_PHASELO  = 24 ;	--   Fixed phase that will be used when
  CONSTANT IO62TRIGS_PHASEHI  = 31 ;	--     PHASESET bit is set.

-- ------------------------------
-- A/D converter control and data
--
CONSTANT IO62ADCSR         = H"1C" ;	-- Control/Status Register
  CONSTANT IO62ADCSR_SAMPLO   =  0 ;	--   Present 12-bit A/D sample
  CONSTANT IO62ADCSR_SAMPHI   = 11 ;	--     low and high bits
  CONSTANT IO62ADCSR_OTR      = 12 ;	--   Out-of-range bit
  CONSTANT IO62ADCSR_MINIMIZE = 13 ;	--   Replace instantaneous A/D samples
  CONSTANT IO62ADCSR_MAXIMIZE = 14 ;	--     with Min/Max values.
  CONSTANT IO62ADCSR_AMUX0    = 16 ;	--   Manually selected analog MUX
  CONSTANT IO62ADCSR_AMUX1    = 17 ;
  CONSTANT IO62ADCSR_AMUX2    = 18 ;
  CONSTANT IO62ADCSR_AMUXPCI  = 19 ;	--   Force AMUX<2:0>, else internal

-- ------------------------------
-- Board-to-Board serial protocol
--
CONSTANT IO62B2B           = H"1D" ;	-- Control/Status Register
  CONSTANT IO62B2B_BITLO      =  0 ;	--   Data bits sent/received to/from
  CONSTANT IO62B2B_BITHI      =  7 ;	--     the other IO62 card.
  CONSTANT IO62B2B_TXCYCLE    = 28 ;	--   These bits toggle on each packet
  CONSTANT IO62B2B_RXCYCLE    = 29 ;	--     that is sent/received.
  CONSTANT IO62B2B_ENA_PHYS   = 31 ;	--   Enable IO62 card's physical I/O

CONSTANT IO62B2B_NBITS = 8 ;		-- Total number of data bits

-- ------------------------------
-- Softplane common control/status register.  Bit definitions can be
-- found in rda_modules.inc.
--
CONSTANT IO62SPLCOM        = H"1E" ;

-- ------------------------------
-- Standard IO62CP remote backpanel access registers
--
CONSTANT IO62CPCNT         = H"20" ;	-- Control Register
  CONSTANT IO62CPCNT_ENA_PHYS =  0 ;	--   Enable IO62 card's physical I/O
  CONSTANT IO62CPCNT_ENA_PANL =  1 ;	--   Enable backpanel's physical I/O
  CONSTANT IO62CPCNT_ENA_CTRL =  2 ;	--   Enable serial control stream
  CONSTANT IO62CPCNT_ENA_BOOT =  3 ;	--   Enable boot chip functions
  CONSTANT IO62CPCNT_ENA_MAIN =  4 ;	--   Enable main chip functions
  CONSTANT IO62CPCNT_RELAY0   =  5 ;	--   Three onboard relays
  CONSTANT IO62CPCNT_RELAY1   =  6 ;
  CONSTANT IO62CPCNT_RELAY2   =  7 ;
  CONSTANT IO62CPCNT_RCOIL0   =  8 ;	--   Four external relay coils
  CONSTANT IO62CPCNT_RCOIL1   =  9 ;
  CONSTANT IO62CPCNT_RCOIL2   = 10 ;
  CONSTANT IO62CPCNT_RCOIL3   = 11 ;
  CONSTANT IO62CPCNT_TMON0H   = 12 ;	--   Force Monitor BNCs high
  CONSTANT IO62CPCNT_TMON1H   = 13 ;
  CONSTANT IO62CPCNT_TMON0L   = 14 ;	--   Force Monitor BNCs low
  CONSTANT IO62CPCNT_TMON1L   = 15 ;
  CONSTANT IO62CPCNT_AMUX0    = 16 ;	--   Manually selected analog MUX
  CONSTANT IO62CPCNT_AMUX1    = 17 ;
  CONSTANT IO62CPCNT_AMUX2    = 18 ;
  CONSTANT IO62CPCNT_AMUX3    = 19 ;
  CONSTANT IO62CPCNT_AMUX4    = 20 ;
  CONSTANT IO62CPCNT_AMUXPCI  = 21 ;	--   Force AMUX<4:0>, else internal
  CONSTANT IO62CPCNT_LEDOFF   = 22 ;	--   Force LED Off
  CONSTANT IO62CPCNT_DGDRIVE0 = 23 ;	--   Two spare DG RS-422 pins on J3
  CONSTANT IO62CPCNT_DGDRIVE1 = 24 ;	--     are drivers; else receivers.
  CONSTANT IO62CPCNT_DGDATA0  = 25 ;	--   Data being output by DG pins,
  CONSTANT IO62CPCNT_DGDATA1  = 26 ;	--     if configured as outputs.

CONSTANT IO62CPSTS         = H"21" ;	-- Status Register (Read-Only)
  CONSTANT IO62CPSTS_CODE_LOB =  0 ;	--   High/Low bits of main code rev
  CONSTANT IO62CPSTS_CODE_HIB =  5 ;	--     (6 bits)
  CONSTANT IO62CPSTS_JTAGBUSY =  6 ;	--   Busy with JTAG now
  CONSTANT IO62CPSTS_SERCYCLE =  7 ;	--   Toggles each serial uplink cycle
  CONSTANT IO62CPSTS_DGDATA0  =  8 ;	--   Data seen on DG pins, read back
  CONSTANT IO62CPSTS_DGDATA1  =  9 ;	--     from actual panel lines.

CONSTANT IO62CPSERIALNUM   = H"22" ;	-- Serial number of the backpanel
CONSTANT IO62CPBOARDREV    = H"23" ;	-- Board revision number
CONSTANT IO62CPPATCHLEV    = H"24" ;	-- Board patch level

CONSTANT IO62CPGIO0        = H"25" ;	-- General purpose digital I/O
  CONSTANT IO62CPGIO_USERLO   =  0 ;	--   Low bit of user data word
  CONSTANT IO62CPGIO_USERHI   = 19 ;	--   High bit of user data word
  CONSTANT IO62CPGIO_DRIVERS  = 20 ;	--   Output drivers (vs input receivers)

CONSTANT IO62CPGIO1        = H"26" ;	-- Four more, just like the above.
CONSTANT IO62CPGIO2        = H"27" ;	-- All five GIO registers are assumed
CONSTANT IO62CPGIO3        = H"28" ;	--   to be sequential.
CONSTANT IO62CPGIO4        = H"29" ;

-- ------------------------------
-- ORDA (RVP8 side) remote backpanel access registers
--
CONSTANT ORDACNT           = H"2A" ;	-- Control Register
  CONSTANT ORDACNT_ENA_PHYS   =  0 ;	--   Enable IO62 card's physical I/O
  CONSTANT ORDACNT_PRATE0     =  1 ;	-- Pulse rate interval bits
  CONSTANT ORDACNT_PRATE1     =  2 ;
  CONSTANT ORDACNT_PRATE2     =  3 ;
  CONSTANT ORDACNT_LEDOKAY    =  4 ;	-- Turn on the RVP8 'okay' LED
  CONSTANT ORDACNT_AMUX0      =  5 ;	-- Analog MUX select
  CONSTANT ORDACNT_AMUX1      =  6 ;
  CONSTANT ORDACNT_SPARE1     =  7 ;	-- Spare output driver
  CONSTANT ORDACNT_RADSTS0    =  8 ;	-- Radiate/Test status
  CONSTANT ORDACNT_RADSTS1    =  9 ;
  CONSTANT ORDACNT_RADSTS2    = 10 ;
  CONSTANT ORDACNT_RXPROTOK   = 11 ;	-- Rx protection handshake is okay
  CONSTANT ORDACNT_TP_A_0     = 24 ;	-- Test point 'A' 4-bit select code
  CONSTANT ORDACNT_TP_A_3     = 27 ;
  CONSTANT ORDACNT_TP_B_0     = 28 ;	-- Test point 'B' 4-bit select code
  CONSTANT ORDACNT_TP_B_3     = 31 ;

    -- Radiate/Test status values
    --
    CONSTANT ORDA_RSTS_RADIATE  =  1 ;	-- Radiate ON
    CONSTANT ORDA_RSTS_RFDTEST  =  2 ;	-- RFD Test Mode
    CONSTANT ORDA_RSTS_CWTEST   =  4 ;	-- CW Test Mode

    -- List of available test points
    --
    CONSTANT ORDA_TP_RFGATE     =  1 ;
    CONSTANT ORDA_TP_RFPLSTART  =  2 ;
    CONSTANT ORDA_TP_MODDISCHG  =  3 ;
    CONSTANT ORDA_TP_MODCHARGE  =  4 ;
    CONSTANT ORDA_TP_FILAMENT   =  5 ;
    CONSTANT ORDA_TP_RFDRIVE    =  6 ;
    CONSTANT ORDA_TP_POSTCHARGE =  7 ;
    CONSTANT ORDA_TP_TRIGCHARGE =  8 ;
    CONSTANT ORDA_TP_RXPROTCMD  =  9 ;
    CONSTANT ORDA_TP_RXPROTRSP  = 10 ;
    CONSTANT ORDA_TP_CATHODE    = 11 ;
    CONSTANT ORDA_TP_PHZRATEDGE = 12 ;
    CONSTANT ORDA_TP_PHCOHOSEL  = 13 ;

-- ------------------------------
-- MIT/LL TDWR V1 support for standard remote panel
--
CONSTANT TDWRV1            = H"2B" ;	-- Control Register
  CONSTANT TDWRV1_ENA_PHYS    =  0 ;	--   Enable IO62 card's physical I/O
  CONSTANT TDWRV1_MODE0       =  4 ;	--   Mode of operation
  CONSTANT TDWRV1_MODE1       =  5 ;

    CONSTANT TDWRV1MD_NORMAL     = 0 ;	--   Normal running mode
    CONSTANT TDWRV1MD_MINIMUM    = 1 ;	--   Remain at minimum attenuation
    CONSTANT TDWRV1MD_MAXIMUM    = 2 ;	--   Remain at maximum attenuation
    CONSTANT TDWRV1MD_LOAD       = 3 ;	--   Load new serial table data

  CONSTANT TDWRV1_SAMP5UP     =  8 ;	--   Synchronously sampled I/O status lines
  CONSTANT TDWRV1_SAMP5DN     =  9 ;	--     during rising/falling edges of user
  CONSTANT TDWRV1_SAMP6UP     = 10 ;	--     triggers.
  CONSTANT TDWRV1_SAMP6DN     = 11 ;
  CONSTANT TDWRV1_SAMP7UP     = 12 ;

-- ------------------------------
-- Serializer supporting arbitrary line protocols
--
CONSTANT IO62SERIALCSR0    = H"2C" ;	-- Control Register
CONSTANT IO62SERIALDATA0   = H"2D" ;	-- Data Register

  CONSTANT IO62SER0_ENTTY0    = 1 ;	-- Hookup to RS232 TTY0 lines
  CONSTANT IO62SER0_RX12_TX16 = 2 ;	-- Rx/Tx on GPIO lines 12+/16+
  CONSTANT IO62SER0_FREERUN   = 3 ;	-- Freerunning, hookup done elsewhere

-- ------------------------------
-- Optional Shaft encoder inputs
--
CONSTANT IO62SHAFTAZ       = H"30" ;	-- Status registers for Azimuth and
CONSTANT IO62SHAFTEL       = H"31" ;	--   Elevation encoders (Read Only)

  -- The number of bits in the up/dn counter is based on a maximum count
  -- rate of 2000 quadrature increments/second, and a maximum time between
  -- sampling of 15ms.
  --
  CONSTANT IO62SHAFTNUMBITS   =   6 ;	-- Size of up/dn counter

  CONSTANT IO62SHAFTINDEX     =  12 ;	-- Index pulse current level
  CONSTANT IO62SHAFTINDEXTOG  =  13 ;	-- Index pulse has toggled  \ Cleared on
  CONSTANT IO62SHAFTERROR     =  14 ;	-- A/B Protocol error       /  PCI read

-- ------------------------------
-- A/D logger RAM is mapped into the upper portion of the CSR space
--
CONSTANT IO62ADCRAM        = H"60" ;	-- Base of RAM area

-- ************************************
-- *                                  *
-- * Global Circuit Board Definitions *
-- *                                  *
-- ************************************

-- ------------------------------
-- Interrupt UNIT assignments to ISR register
--
CONSTANT IO62INTUNIT_TIMER0   =  0 ;	-- Counter/Timer #0
CONSTANT IO62INTUNIT_TIMER1   =  1 ;	-- Counter/Timer #1
CONSTANT IO62INTUNIT_TIMER2   =  2 ;	-- Counter/Timer #2
CONSTANT IO62INTUNIT_IOSER0   =  3 ;	-- I/O Serializer #0

-- Other hardware constants
--
CONSTANT IO62CLKFREQ    = 40000000 ;	-- Reference clock frequency
CONSTANT IO62BOOTMIDCLK = 0 ;		-- Boot data transitions on edges
