/* **********************************************************************
 * *                                                                    *
 * *             IO62 PCI Card Private Driver Definitions               *
 * *                                                                    *
 * **********************************************************************
 * File: rda/pcicards/io62_def.h
 *
 *                        COPYRIGHT (c) 2002  BY
 *          SIGMET INCORPORATED, WESTFORD MASSACHUSETTS, U.S.A.
 * 
 * THIS SOFTWARE IS FURNISHED UNDER A LICENSE AND MAY BE USED AND  COPIED
 * ONLY  IN  ACCORDANCE WITH  THE  TERMS  OF  SUCH  LICENSE  AND WITH THE
 * INCLUSION OF THE ABOVE COPYRIGHT NOTICE.  THIS SOFTWARE  OR  ANY OTHER
 * COPIES  THEREOF MAY NOT BE PROVIDED OR OTHERWISE MADE AVAILABLE TO ANY
 * OTHER PERSON.  NO TITLE TO AND OWNERSHIP OF  THE  SOFTWARE  IS  HEREBY
 * TRANSFERED.
 */
#ifndef SIGMET_IO62_DEF_H
#define SIGMET_IO62_DEF_H 1

/* ------------------------------
 * Opaque driver information structure
 */
#ifdef SIGMET_IO62_H
struct io62_info {		
  /* Card file descriptors and memory pointers
   */
  SINT4 sizes[1] ;		/* Sizes and channels for each mapped */
  SINT4 chans[1] ;		/*   PCI or kernel memory segment. */
  volatile struct io62_csr *csr ; /* ==> Control/Status area */

  char sDevName[40] ;		/* Device name */

  UINT4 lOpened ;		/* Device is opened */
  UINT4 lSecUnit ;		/* Secondary unit (of possible two) */
  struct rda_boardinfo openInfo ;

  /* Diagnostic test results, and related information.
   */
  UINT4 dgBits ;		/* Summary error bits */
#define IO62DG_MIRROR    0x00000001 /* PCI mirror register */
#define IO62DG_RSLOOP_A  0x00000002 /* RS422 driver loopback (TTL reads) */
#define IO62DG_RSLOOP_B  0x00000004
#define IO62DG_RSLOOP_C  0x00000008
#define IO62DG_RSLOOP_D  0x00000010
#define IO62DG_RSLOOP_E  0x00000020
#define IO62DG_TTLOOP_A  0x00000040 /* TTL driver loopback (RS422 reads) */
#define IO62DG_TTLOOP_B  0x00000080
#define IO62DG_TTLOOP_C  0x00000100
#define IO62DG_TTLOOP_D  0x00000200
#define IO62DG_TTLOOP_E  0x00000400

  UINT4 dgMirrorBits[2] ;	/* PCI mirror errors (0-->1 and 1-->0 errors) */

  UINT4 dgRSLoopErrs[2] ;	/* Error bits from RS422 loopback tests */
  UINT4 dgTTLoopErrs[2] ;	/* Error bits from TTL loopback tests */

  /* Information about the onboard general purpose timer(s) and the
   * front panel display.
   */
  struct gpTimerInfo gpTimerInfo ;
  struct  matorbInfo  matorbInfo ;

  /* Generic serializer hardware
   */
  struct ioSerialInfo ioSerialInfo ;

  /* Information about the entire set of general purpose I/O lines.
   */
  struct ioLinePair lines[ IO62GIO_NPAIRS ] ;

  /* Optional IO62CP backpanel
   */
  UINT4 iCpGioDrivers ;		/* Five data direction bits for TTL DB25's */
  SINT4 iCpBoardRev ;		/* Board revision and serial number, put here */
  SINT4 iCpSerialNum ;		/*   so it can be accessed w/out PCI cycles. */

  UINT4 iCpDgBits ;		/* Summary error bits */
#define IO62CPDG_J1      0x00000002 /* Problem with patch test somewhere */
#define IO62CPDG_J2      0x00000004 /*   on the named connector. */
#define IO62CPDG_J3      0x00000008
#define IO62CPDG_J4      0x00000010
#define IO62CPDG_J5      0x00000020
#define IO62CPDG_J6      0x00000040
#define IO62CPDG_J7      0x00000080
#define IO62CPDG_J8      0x00000100
#define IO62CPDG_J9      0x00000200
#define IO62CPDG_J10     0x00000400
#define IO62CPDG_J11     0x00000800
#define IO62CPDG_J12     0x00001000
#define IO62CPDG_J13     0x00002000
#define IO62CPDG_J14     0x00004000
#define IO62CPDG_J15     0x00008000
#define IO62CPDG_J16     0x00010000
#define IO62CPDG_J17     0x00020000
#define IO62CPDG_J18     0x00040000

  /* Analog MUX state variables for automated scans of the entire
   * IO62CP backpanel analog inputs.
   */
  UINT4 iADCLastTime[ ADCLOGRAMSIZE ] ;	/* Binary time of last entry */
  UINT4 iADCLastSamp[ ADCLOGRAMSIZE ] ;	/* Last logged value we saw, and */
  UINT4 iADCGndSamps[ ADCLOGRAMSIZE ] ;	/*   GND value at that last time. */
  UINT4 iADCScans ;		/* Count of scans done so far */

  struct io62cpAMUXTop io62cpAMUX ; /* Normalized/corrected sampled values */

  /* Optional registers for internal features and custom panels. Use
   * these copies of the CSRs to allow bit merging without requiring
   * any PCI reads.
   */
  UINT4 iORDACnt ;		/* Custom ORDA panel */
  UINT4 iTdwrV1CSR ;		/* TDWR features register */
  UINT4 iB2BCSR ;		/* Board-to-board serial control */
  UINT4 iADCSR ;		/* A/D converter CSR */
  UINT4 iTrigs ;		/* Trigger source selection */

  /* All PCI access to the board's CSR registers are locked by this
   * one mutex.  Although this may sometimes lockout two unrelated
   * processes that would not actually interfere with each other, it
   * removes any worry about deadly embraces caused by order of locks
   * and order of subroutine calls.
   */
  pthread_mutex_t CSRMutex ;	/* For indivisible CSR access */

  /* Likewise, the following mutex should bracket all indivisible
   * sequences of driver activity that can not be handled by the CSR
   * lock alone.
   */
  pthread_mutex_t SeqMutex ;	/* For indivisible sequential access */
} ;
#endif /* #ifdef SIGMET_IO62_H */

#endif /* #ifndef SIGMET_IO62_DEF_H */
