Vaisala I/O-62 PCI card

Vaisala I/O-62 features
Feature Description
PCI card Short format PCI card with 62-position D connector. Multiple cards may be installed.
D/A, A/D, discrete inputs and outputs (TTL, wide range, RS422, and similar) See the following summary table.
Expandable I/O Allows the addition of a second I/O-62 and connector panel.
I/O pin assignment Mapping by softplane.conf file allows easy reconfiguration of the pin assignments without custom wiring.
ESD protection Uses Tranzorb silicon avalanche diode surge suppression and high-voltage tolerant components.
Vaisala I/O-62 summary of electrical interfaces
Quantity Description
40

Lines configurable in groups of 8 to be either inputs or outputs. The electrical specifications are software defined within each group as follows:

  • Single-ended TTL input or output with software-configured pull-up or pull-down resistors (2.2 kΩ) for inputs. Logic threshold +2.5 VDC. Output impedance 120 Ω.

  • Wide range inputs (±27 VDC, threshold +2.5 VDC), often used for lamp voltage status inputs.

  • RS-422/485 @ 10 MBit/sec (requires 2 lines each). Low output impedance.

    RS-422 receivers can be configured in software to have 100 ohm termination between each pair.

8

A/D convertors configurable as 0, 4, or 8 convertors, ±2 V, 12 bits @ 10 MHz,

These lines are shared with some of the 40 I/O lines.

2 D/A convertors, ±10 V 1 MHz update rate, output can drive a 75 Ω load.
2 SPDT relays on the board. These are often used for switching high power relays. Contacts are diode protected.
2 RS-232C full duplex lines (Tx and Rx)
4 12 V 75 Ω trigger drivers.
2

Power/Ground pairs of 12 V power (filtered, fused) for external equipment or remote backpanel use (up to 24 W total).

Polyfuse technology acts like a circuit breaker with auto reset in the event of an overload.

8 Ground wires for signal grounds from the remote back panel.
RVP and RCP8 I/O-62 card jumper settings
Jumper ID Description AB BC Not Installed
JP1 BOOT Controls the card boot–up. X X Normal boot
JP2 JTAG

Enables on-board flash re-programming for code version upgrades.

Other settings are reserved for maintenance functions.

Enable flash Maintenance Maintenance
JP3 TTYX0/ RSV

Assign dedicated hardware I/O lines to pins on DBF62 connector on the back of the I/O-62. The selections are made among:

  • Two RS232 lines noted as TTY0 or TTYt with transmit and receive for each.
  • Four trigger output lines.
  • Three contact positions for onboard DIP relays (K1 and K2).

The AB column shows the pins.

Pin 47 TTYX0 -- --
JP4 TRIG0/ TTYX0 Pin 49 TRIG0 TTYX0 --
JP5 TRIG1/ K1NC Pin 51 TRIG1 K1 Normally closed contact --
JP6 TRIG2/ K1NO Pin 53 TRIG2 K1 Normally open contact --
JP7 TRIG3/ K1CT Pin 55 TRIG3 K1 center contact --
JP8 TTYR0/ K2NC Pin 57 TTYR0 K2 Normally closed contact --
JP9 TTYX1/ K2NO Pin 59 TTYX1 K2 Normally open contact --
JP10 TTYR1/ K2CT Pin 61 TTYR1 K2 Center contact --