First-in-first-out (FIFO) buffer

RVP10 contains a 4096-word first-in-first-out (FIFO) buffer through which all output data flow.

The FIFO holds each sequential word generated by RVP10 until the user is ready to accept it. When reading from the processor, the host can fall behind by as many as 4096 words before performance slows.

RVP10 writes to the FIFO at full speed as long as it is not full. Internal processing is not affected by the exact speed at which user I/O occurs.

Writing to the FIFO continues as long as the average I/O rate on, perhaps 10 ms intervals, and matches the average rate at which data are being produced.

Full output FIFO

The sequence of events changes when the FIFO is full:

  1. When the processor generates the next output word, it waits in an idle loop until the user makes room in the FIFO by reading out one or more words.
  2. RVP10 waits and does not proceed with its internal processing until space becomes available.

Despite the slowdown in performance, you always obtain correct data no matter how long it takes to read it. You can take advantage of this to synchronize the acquisition of data by the RVP10 with the post-processing and display of that data by the user.

In this case, RVP10 would be instructed to output data at the maximum rate, you can read these words at your maximum rate, and the overall system automatically runs at the slower of those two speeds.

Write cycle and full output FIFO

If the output FIFO is full and the RVP10 has the next word ready for output, the idle wait loop can be exited if the processor detects that the user is performing a write I/O cycle.

Since the user should have been reading data by now, the presence of a write cycle is understood to mean that a more important condition has arisen. The wait loop terminates, and RVP10 accepts the write data soon afterward. If the new data are commands, they are executed right away, but any output they try to produce may be lost in a similar manner. The processor continues to execute all commands correctly, but that their output is discarded.

The discarded output data are not lost. The data are eventually replaced with an equal number of zeros. Each time RVP10 discards an output word, it increments an internal 24-bit count. When FIFO space becomes available, the processor replaces the missing data with zero-valued placeholders.

Writing when the FIFO is full can be useful if the new command is a RESET which calls for clearing the output FIFO. When the RESET is processed, all past and present output data are discarded, leaving the RVP10 output section empty. This is useful when the processor has pending output data that the user wants to discard.